The present invention relates in general to power switching devices in an inverter bridge, and, more specifically, to active gate clamping to avoid unintended activations of power switching devices in an inverter.
Electric vehicles, such as hybrid electric vehicles (HEVs), plug-in hybrid electric vehicles (PHEVs), and battery electric vehicles (BEVs), use inverter-driven electric machines to provide traction torque. A typical electric drive system may include a DC power source (such as a battery pack or a fuel cell) coupled by contactor switches to a variable voltage converter (VVC) to regulate a main bus voltage across a main DC linking capacitor. An inverter is connected between the main buses and a traction motor in order to convert the DC bus power to an AC voltage that is coupled to the windings of the motor to propel the vehicle.
The inverter includes transistor switching devices (such as insulated gate bipolar transistors, IGBTs) connected in a bridge configuration with a plurality of phase legs. A typical configuration includes a three-phase motor driven by an inverter with three phase legs. An electronic controller turns the switches on and off to invert a DC voltage from the bus to an AC voltage applied to the motor. The inverter typically pulse-width modulates the DC link voltage to deliver an approximation of a sinusoidal current output to drive the motor at a desired speed and torque. Pulse Width Modulation (PWM) control signals applied to the gates of the IGBTs turn them on and off as necessary so that the resulting current matches a desired current.
Because each phase leg of the inverter has a pair of upper and lower switching transistors connected across the DC link, it is important that both devices in a leg not be conducting (i.e., turned-on) simultaneously. A short time interval (known as dead-time) is typically inserted in the PWM switching signals during which both the upper and lower switching devices of a phase leg are turned off in order to prevent “shoot-through” between the positive and negative buses. Due to electrical noise and magnetic coupling between the electrical components and signal paths of the gate inputs of the transistors, care must be taken to avoid inadvertent turning on of a transistor when its gate drive signal is intended to be off. Active clamping is sometimes used, wherein a clamp connected across the gate is activated to ensure that the switching transistor stays off.
Common source inductance refers to an inductance shared by the main power loop (i.e., the drain-to-source or collector-to-emitter power output of the transistor) and the gate driver loop (i.e., gate-to-source or gate-to-emitter) in a power switching transistor. The common source inductance carries both the device output current (e.g., drain to source current) and the gate charging/discharging current. A current in the output (power loop) portion of the common source inductance modifies the gate voltage in a manner that reinforces (e.g., speeds up) the switching performance. For a switching bridge, the reduced switching time may be desirable since it may have an associated reduction in the energy consumed (i.e., lost) during the switching transition, as long as other potential side effects are contained. For example, the presence of a large common source inductance could interfere with the operation of a conventional active clamp.